An integrated circuit (IC) chip incorporates millions of active and passive electrical components on a semiconductor substrate within an area usually less than 100 mm2. Layers of materials are deposited, implanted, patterned, and/or removed in order to form the active and passive electrical components and interconnection structures of the IC chip. Usually, tens or even hundreds of similar or identical IC chips are arranged to be manufactured on a single wafer for efficient mass production. The larger the wafer size, the more IC chips can be manufactured on a single wafer, and thus the fabrication cost for each IC chip is lower.
On the other hand, an edge portion of the wafer tends to be more vulnerable to the handling of automated robot arms, various kinds of process variations, such as poor step-coverage when forming a film thereon, trapped voids when filling openings, or damages caused by material exposure, plasma-arcing, or other uniformity issues of the processes. These issues not only result in defective chips at the edge portion of the wafer. The defects, such as cracks or delaminated layers, at the edge portion of the wafer may further propagate inward toward the center of the wafer and thus lead to more defective chips at an inner portion of the wafer.